The present invention relates to semiconductor integrated circuit devices, and more particularly to techniques which are effective when applied to a semiconductor integrated circuit device having a dynamic RAM (Dynamic Random Access Memory).
The memory cell of a dynamic RAM is constructed of a MISFET for selecting the memory cell (a transfer MISFET) and a capacitor element for storing information, which is connected in series with one of the semiconductor regions of the MISFET. In order to increase the degree of integration of the DRAM, researches have been made on techniques which are intended to reduce the area of the memory cell occupying a surface of a semiconductor substrate, without lowering the capacitance of the capacitor element. As one of such techniques, an example wherein a deep trench is formed in the principal surface of the semiconductor substrate so as to form the transfer MISFET and the capacitor element therein, in overlapping fashion, is described in "IEDM Technical Digest," pp. 714-717, 1985. According to this technique, the capacitor is formed at the lower part of the trench, while the transfer MISFET is formed at the upper part of the trench. In addition, the capacitor element is formed by providing a dielectric film on the wall surface of the trench and thereafter burying polycrystalline silicon in the resulting trench. The film of the polycrystalline silicon buried in the trench serves as one electrode of the capacitor element, and the semiconductor substrate as the other electrode. Besides, the polycrystalline silicon film of the capacitor element is connected to the source or drain of the transfer MISFET formed at the upper part of the trench. Thus, in writing information, a ground potential V.sub.ss, e.g., 0 V or a power source potential V.sub.cc e.g., 5 V is applied to the polycrystalline silicon film via the transfer MISFET in accordance with the information. The semiconductor substrate serving as the other electrode of the capacitor element is fixed to the ground potential V.sub.ss or a still lower potential in order to stabilize the operations of N-channel MISFETs formed on the principal surface thereof. This potential of the semiconductor substrate becomes the reference potential of the capacitor element. Since, in this manner, the semiconductor substrate is used as the other electrode of the capacitor, a low impurity concentration in the surroundings of the trench of the semiconductor substrate incurs the drawback that, when the information of "H" (high level), namely, the information corresponding to the power source potential V.sub.cc is to be written, the surroundings of the trench are depleted, so a predetermined capacitance fails to be attained. Therefore, the deep part of the semiconductor substrate where the capacitor element is provided is turned into the p.sup.+ -type (the impurity concentration of a p-type impurity is high) so as to prevent the depletion. The vicinity of the source or drain of the transfer MISFET, however, is formed of a p-type region for the reason that the MISFET fails to operate when the impurity concentration of a p-type impurity is high.